%0 Journal Article
%T 1.5–3.3 GHz, 0.0077 mm2, 7 mW All-Digital Delay-Locked Loop With Dead-Zone Free Phase Detector in $0.13~\mu \text{m}$ CMOS
%V 65
%N 1
%P 39-50
%* https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html
%U http://ieeexplore.ieee.org/document/7962188/
%J IEEE Transactions on Circuits and Systems I: Regular Papers
%A Bayram, Erkan
%A Aref, Ahmed Farouk
%A Saeed, Mohamed
%A Negra, Renato
%D 1/2018